1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device and, more particularly, to a method for forming a contact of a semiconductor memory device and method for forming a semiconductor device using the same.
2. Description of the Related Art
As semiconductor memory devices become highly integrated, it becomes more difficult to provide interconnections therein. Specifically, a voltage must be applied to a gate electrode, a source/drain, and a bulk substrate to drive a transistor. To realize this, a contact hole must be formed in each terminal, and metal interconnections are also required.
However, along with an increase in the integration density of the semiconductor memory devices, the design rule decreases, and the size of the contact hole becomes smaller. In particular, in case of a semiconductor memory device having a stack-type capacitor, as the size of the chip is reduced, the height of the capacitor is inevitably increased. The depth of the contact hole is also increased. As a result, the contact hole is incompletely formed, or the contact resistance increases.
One conventional approach to overcome this problem is to employ a two-step process to form a contact connected to active regions of a semiconductor substrate. This conventional method for forming a contact will be described with reference to FIGS. 1A through 1C.
First, referring to FIG. 1A, a first interlevel dielectric (ILD) layer 110 is formed on a semiconductor substrate 100. Then, a first contact hole 112 for opening an active region 102 of the semiconductor substrate 100 is formed.
Next, referring to FIG. 1B, a lower contact plug 114 is formed by filling the first contact hole 112 with a conductive material. Subsequently, a second ILD layer 120 is formed on the first ILD layer 110 and on the lower contact plug 114. The second ILD layer 120 is etched to form a second contact hole 122 for opening the lower contact plug 114.
Next, referring to FIG. 1C, an upper contact plug 130 is formed by filling the second contact hole 122 with a conductive material, thereby forming contact plugs 114 and 130 for connecting a metal interconnection (not shown) on the second ILD layer 120 to the active region 102 on the semiconductor substrate 100.
However, this method for forming a contact has several drawbacks such as ones described below. Although not shown, semiconductor devices such as a capacitor, a bit line contact, and a contact for forming a capacitor, are formed in the first and second ILD layers 110 and 120, and thermal processes with a long processing time is required during the fabrication of a contact. One example of such thermal processes is an annealing process for activating dopants. Another example is an annealing process performed during the deposition of a capacitor dielectric layer, in the case of using a doped polysilicon as a contact material for forming a contact connected to a capacitor electrode. As a result, dopants from the active region 102 of the semiconductor substrate 100, especially, p-type dopants, are diffused and escape through the lower contact plug 114. This significantly deteriorates the electrical characteristics of the active region 102, i.e., a transistor. This phenomenon becomes severe when the contact plug is formed of a metal. Furthermore, diffusion of dopants occurs more remarkably when an ohmic layer (not shown) formed of silicide is interposed between the active region and the contact plug.
Each memory block forming a memory device in a semiconductor memory device can be divided into a cell region and a peripheral circuit region. In general, dopants must be doped onto an active region of the cell region and onto an active region of the peripheral circuit region. Thus, if the contact is formed on the active region of the peripheral circuit region, there is a significant deterioration of the electrical characteristics caused by the diffusion of dopants. If a thermal process at a temperature of greater than 650° C. with a long processing time is performed during the formation of a device of the cell region during the formation of the contact of the peripheral circuit region, the contact resistance greatly increases and this makes it almost impossible to form the proper contact.